The ubiquitous integrated chips utilized in the making of modern electronic devices are constructed from small, fragile silicon wafers. It is imperative that these wafers possess flat, blemish-free, mirror-like surfaces, since surface imperfections can adversely affect the electrical properties of the final integrated chips.
Typically, substrate wafers are cut by diamond-sawing single crystal silicon rods. In order to ensure integrated chips of sound structural integrity, it is first necessary to remove the roughened portion of the crystal surface which was produced during the sawing procedure prior to having circuit elements and conductor wirings formed thereon which then forms a semiconductor chip suitable for use in today's electronic items.
The first operation for obtaining a blemish-free surface is called “lapping”. The lapping operation employs a coarse abrasive such as coarse alumina or silicon carbide abrasive particles. Lapping removes coarse surface imperfections from the sawing operation. Lapping also provides flatness and parallelism to the surface.
After the lapping operation, a series of polishing steps are employed to eliminate the remaining surface imperfections. During the polishing operation, a number of silicon wafers are typically mounted or “fixtured” onto a nonceramic (such as metal) or ceramic carrier or polishing head by a template assembly or by an adhesive material, in order to eliminate the need for manually polishing each individual wafer. The template assembly consists of impregnated polyurethane and plastic retaining rings to hold the silicon wafers in place. Adhesive materials may be a wax or a resin dissolved in a suitable solvent.
However, it is desirable to utilize water-based adhesive materials to avoid the problems associated with volatile organic solvents. Furthermore, since the adhesive materials used are derived from natural products (such as rosin), there are inconsistencies associated with batch to batch variations which makes it difficult for one to maintain a tight control on product variation. The batch to batch variation can in turn lead to adhesion problems of the semiconductor wafer to the nonceramic or ceramic carrier or polishing head, leading to wafer defects. Therefore, in order to avoid problems stemming from batch to batch variations, it is also desirable to use adhesive compositions comprising synthetic components or products. The present invention avoids the aforementioned problems in that it provides water-based adhesive compositions and utilizes synthetic components.
U.S. Pat. No. 5,942,445 discloses a method of manufacturing a semiconductor wafer comprising the steps of flattening a thin disc-shaped wafer obtained right after slicing by surface grinding, and polishing the flattened wafer on both sides simultaneously. This patent discloses the presence of a wax or like adhesive between wafer and a base plate.
U.S. Pat. No. 5,534,053 discloses a method for reducing or eliminating static charges on fixturing adhesive films and silicon wafers so treated by adding an antistatic agent to the fixturing adhesive.